Understanding Gen-Z Technology – A High Performance
Interconnect for the Data-Centric Future
SessionCommunications and Software
Presenter
Event Type
Exhibitor Forum
TimeTuesday, November 14th2:30pm -
3pm
Location503-504
DescriptionGen-Z is a high-bandwidth, low-latency fabric with
separate media and memory controllers that can be
realized inside or beyond traditional chassis limits. It
treats all components as memory (memory-semantic
communications), and moves data with minimal overhead
and latency, taking full advantage of emerging
persistent memory (memory accessed over the data bus at
memory speeds). Gen-Z can also handle compute elements,
such as GPUs, FPGAs, and ASIC or coprocessor-based
accelerators, with no need for extra copy operations,
special DMA channels, or complex error recovery schemes.
Separate controllers allow scaling of processing, media,
and memory with an end result of higher throughput and
lower complexity for big data solutions in such
applications as data analytics, deep packet inspection,
artificial intelligence, machine learning, and video and
image processing. Learn about this new approach and how
it promotes innovation during this presentation.
Presenter
