Organizers
Event Type
Workshop

Debugging
Exascale
Performance
TimeSunday, November 12th9am -
5:30pm
Location712
DescriptionThe path to exascale computing will challenge HPC
application developers in their quest to achieve the
maximum potential that the machines have to offer.
Factors such as limited power budgets, clock frequency
variability, heterogeneous load imbalance, hierarchical
memories, and shrinking I/O bandwidths will make it
increasingly difficult to create high-performance
applications. Tools for debugging, performance
measurement and analysis, and tuning will be needed to
overcome the architectural, system, and programming
complexities envisioned in exascale environments. At the
same time, research and development progress for HPC
tools faces equally difficult challenges from exascale
factors. Increased emphasis on autotuning, dynamic
monitoring and adaptation, heterogeneous analysis, and
so on will require new methodologies, techniques, and
engagement with application teams. This workshop will
serve as a forum for HPC application developers, system
designers, and tools researchers to discuss the
requirements for exascale- enabled tools and the
roadblocks that need to be addressed. The workshop is
the fifth in a series of SC conference workshops
organized by the Virtual Institute - High Productivity
Supercomputing (VI-HPS), an international initiative of
HPC researchers and developers focused on parallel
programming and performance tools for large-scale
systems. The workshop includes a keynote address,
peer-reviewed technical papers, and a lively panel
session.