Event Type
Tutorial

Performance
TimeSunday, November 12th8:30am -
12pm
Location201
DescriptionThe Roofline performance model offers insightful and
intuitive method for extracting key characteristics of
HPC applications and comparing them against peak
upper-bounds of modern platforms and
micro-architectures. Its capability to abstract the
complexity of modern non-uniform memory hierarchies and
identify the most profitable optimization techniques had
made Roofline-based analysis increasingly popular in HPC
community. Although different flavors of the roofline
model have been developed to deal with various
definitions of memory data traffic (by some of the
contributors and presenters of this tutorial), there is
still need for a more systematic methodology when
applying them to analyze the efficiency of applications
in multi/many-core systems. The tutorial aims to bridge
this gap by exposing the fundamental aspects behind
different Roofline modeling principles and providing
several practical use-case scenarios to show their
usability for application optimization. This tutorial
presents a unique and solid combination of novel
methodologies applied to optimize a representative set
of open science use cases, while highly
practice-oriented topics and labs are given by the lead
methodology researchers or main designer of Intel’s
Roofline automation tools. The tutorial presenters have
a long experience working with the Roofline model and
have presented several Roofline-based tutorials.
Links