Presenters
Event Type
Tutorial

Parallel Programming Languages, Libraries, Models
and Notations
TimeSunday, November 12th8:30am -
5pm
Location302
DescriptionAs processors continue to eke out more performance at
the cost of complexity, an understanding of the
underlying hardware is essential to developing code that
runs well on new platforms such as the KNL. To take
advantage of these features, application development now
requires the consideration of at least three different
levels of parallelism (MPI, threading, SIMD), proper
task/thread placement, and the allocation of limited
resources such as high bandwidth memory.
This tutorial is designed for experienced programmers familiar with OpenMP who wish to familiarize themselves with Intel’s next generation manycore processor, the 2nd Generation Intel Xeon Phi “Knights Landing” (KNL). We will start by discussing the evolution of manycore processing and provide an overview of the KNL hardware and its various memory modes. Then, we will briefly show the use of reports and directives to improve vectorization and the implementation of proper memory access. We will next focus on new Intel VTune Amplifier XE capabilities that allow for in-depth memory access analysis and hybrid code profiling, as well as Intel Advisor capabilities for vectorization analysis. Hands-on exercises will be executed on the KNL-upgraded Stampede system at the Texas Advanced Computing Center (TACC).
This tutorial is designed for experienced programmers familiar with OpenMP who wish to familiarize themselves with Intel’s next generation manycore processor, the 2nd Generation Intel Xeon Phi “Knights Landing” (KNL). We will start by discussing the evolution of manycore processing and provide an overview of the KNL hardware and its various memory modes. Then, we will briefly show the use of reports and directives to improve vectorization and the implementation of proper memory access. We will next focus on new Intel VTune Amplifier XE capabilities that allow for in-depth memory access analysis and hybrid code profiling, as well as Intel Advisor capabilities for vectorization analysis. Hands-on exercises will be executed on the KNL-upgraded Stampede system at the Texas Advanced Computing Center (TACC).
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