Application Porting and Optimization on GPU-Accelerated POWER Architectures
Event Type
Tutorial
GPU
Performance
TimeMonday, November 13th8:30am - 5pm
Location405
DescriptionThe POWER processor has re-emerged as a technology for supercomputer architectures. One major reason is the tight integration of processor and GPU accelerator through the new NVLink technology. Two major sites in the US, ORNL and LLNL, have already decided to have their pre-exascale systems being based on this new architecture.
This tutorial will give an opportunity to obtain in-depth knowledge and experience with GPU-accelerated POWER nodes. It focuses on porting applications to a single node and covers the topics architecture, compilers, performance analysis and tuning, and multi-GPU programming. The tutorial will include an overview of the new NVLink-based node architectures, lectures on first-hand experience in porting to this architecture, and exercises using tools to focus on performance.
This tutorial will give an opportunity to obtain in-depth knowledge and experience with GPU-accelerated POWER nodes. It focuses on porting applications to a single node and covers the topics architecture, compilers, performance analysis and tuning, and multi-GPU programming. The tutorial will include an overview of the new NVLink-based node architectures, lectures on first-hand experience in porting to this architecture, and exercises using tools to focus on performance.
