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Doctoral Showcase: Computing Architectures Exploiting Optical Interconnect and Optical Memory Technologies
TimeTuesday, November 14th10am - 5:15pm
LocationFour Seasons Ballroom
DescriptionThe long-standing “Bandwidth” and “Memory-Wall” problems hinder exascale computing within the available energy boundaries. This work proposes new optical-systems for use in innovative Computing Architectures towards increasing bandwidth and reducing energy-consumption. The initial efforts were devoted towards elevating optical-memories from the so-far single-bit layouts to complete multi-bit optical-cache setups, demonstrating the first optical-cache blueprint at 16Gb/s. The optical-cache credentials are highlighted by proposing an optically enabled Chip-Multiprocessor architecture; the shared single-level optical-cache approach negates the need for complex cache-hierarchy and demonstrates 20% speed-up for PARSEC benchmarks. Extending optics utilization to complete HPC environments, OptoHPC-Sim simulator was developed for supporting system-scale utilization of optical-interconnect and electro-optical routing technologies. Using OptoHPC-Sim, an OptoBoard-based HPC-network is proposed demonstrating 190% mean throughput improvement and 83% mean packet-delay reduction compared to world’s #3 HPC. Finally, all this experience led to the design of the first optical Ternary-CAM-row architecture at 20Gb/s for fast address look-up configurations.