SC17 Denver, CO

P46: Understanding How OpenCL Parameters Impact on Off-Chip Memory Performance of FPGA Platforms

Authors: Yingyi Luo (Northwestern University), Zheming Jin (Argonne National Laboratory), Kazutomo Yoshii (Argonne National Laboratory), Seda Ogrenci-Memik (Northwestern University)

Abstract: Reconfigurability has strong potential to achieve higher performance and energy efficiency in the post-Moore era. Field-programmable gate arrays (FPGAs), the most practical reconfigurable architecture today, are becoming more relevant to scientific computing thanks to hardened floating-point circuits and emerging FPGA high-level synthesis (HLS) technology. Most notably, FPGA vendors started supporting OpenCL for FPGA platforms, and some OpenCL-based codes have been ported to FPGAs. However, OpenCL offers no guarantee for performance portability; optimal OpenCL parameters such as global size and local size are different between platforms, which could lead to unfair comparisons. In this study, our objective is twofold: 1) to understand how OpenCL parameters impact off-chip memory access performance of the current generation of OpenCL-FPGA platforms and 2) to find effective OpenCL parameters empirically from microbenchmark results.
Award: Best Poster Finalist (BP): no

Poster: pdf
Two-page extended abstract: pdf

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