The ARM User Experience: Testbeds and Deployment at HPC Centers
Authors: Dr. Jack Wells (Oak Ridge National Laboratory)
BP
Abstract: The ARM architecture is gaining a lot of traction in the HPC community as evidenced by several ARM-based projects including the Japanese Post-K, European Mont-Blanc, and the UK’s GW4/EPSRC efforts. This BoF will bring together users and computational centers in the HPC community to present and discuss their experiences of using or deploying state-of-the-art ARM HPC systems. The BoF will consist of a series of brief presentations and a panel discussion session. It is the intent of the organizers that more than 50 percent of the time will be invested in community discussion, including vigorous participation from general attendees.
Long Description: In recent years, the ARM architecture has gained a lot of traction in the HPC community as evidenced by several ARM-based projects including the Japanese Post-K, European Mont-Blanc, and the UK’s GW4/EPSRC efforts. The ARM HPC community is growing as the hardware is being tailored for HPC workloads via additions such as ARMv8-A Scalable Vector Extension (SVE) technology, and its software stack is growing to meet HPC applications needs as evidenced by the recently announced ARM Performance Libraries. This will be the first SC ARM BoF that will bring together experts from the HPC community including national laboratories, a variety of vendors, and international research centers to give short presentations discussing the current state-of-the-art of the ARM HPC ecosystem and how to advance its development to meet applications requirements at Exascale. Short talks will be offered by ARM eco-system experts, researchers, and users in various fields, such as computational science, compilers, runtime environments, fabric enablement, performance tools, scientific libraries, schedulers, provisioning systems, benchmarks and administrative tools. We will highlight users of testbed programs, highlighting their goals and outcomes to date. This venue will provide an opportunity for the HPC community to learn about the latest research and development on the ARM architecture, and we will hold a panel session for active discussion between the BoF participants and audience.
The BOF will offer attendees the opportunity to engage and interact with early adopters and contributors, discuss ongoing development efforts and provide feedback on the current and future trends of ARM-based technologies. This BoF will also open the floor to discuss the latest advances in ARM addressing challenges in system architecture, networking, memory designs, exploitation of accelerators, programming models, and porting applications are of current interest within the HPC community. In particular, we would like to discuss how users and compilers are the new ARM Scalable Vector Extension (SVE) technology is of interest. Other pertinent topics include programming models, scientific libraries, tools, runtime libraries, benchmarking and application porting experiences to ARM.
The BoF will consist of a series of short talks and a panel session at the end. For the short talks (e.g. 5mins each), the participants will hear from industry experts or laboratories who have contributed to the ecosystem on the state of various software components required to deploy and manage ARM-based HPC compute clusters. Some of the speakers will be members of a panel session where participants are encouraged to ask questions and start a dialog to provide feedback on current and future efforts. After the BoF ends, we will produce a report of the discussion topics of the BoF related to ARM’s HPC ecosystem and distribute this via a mailing list of BoF participants collected during our event.
Conference Presentation: pdf
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